High-κ Dielectrics and Interface Passivation for Ge and III/V Devices on Silicon for advanced CMOS

被引:2
|
作者
Heyns, Marc [1 ]
Bellenger, Florence [1 ]
Brammertz, Guy [1 ]
Caymax, Matty [1 ]
De Jaeger, Brice [1 ]
Delabie, Annelies [1 ]
Eneman, Geert [1 ]
Houssa, Michel [2 ]
Lin, Dennis [1 ]
Martens, Koen [1 ]
Merckling, Clement [1 ]
Meuris, Marc [1 ]
Mitard, Jerome [1 ]
Penaud, Julien [3 ]
Pourtois, Geoffrey [1 ]
Scarrozza, Marco [1 ]
Simoen, Eddy [1 ]
Sioncke, Sonja [1 ]
Van Elshocht, Sven [1 ]
Wang, Wei-E [4 ]
机构
[1] IMEC, B-3001 Leuven, Belgium
[2] Katholieke Univ Leuven, Dept Phys, B-3001 Leuven, Belgium
[3] Riber Assignee IMEC, B-3001 Leuven, Belgium
[4] INTEL Assignee IMEC, B-3001 Leuven, Belgium
关键词
MOLECULAR-BEAM EPITAXY; GATE; SEMICONDUCTORS; SEGREGATION; MOSFET;
D O I
10.1149/1.3206606
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
The use of Ge and III/V materials for future CMOS applications is investigated. Passivation of the Ge surface can be obtained by either GeO2 or a thin Si layer. Short channel Ge pMOS devices with low EOT are fabricated. The passivation of III/V materials is a very challenging topic. Some critical issues and passivation schemes are investigated and the performance of inversion channel MOSFET's on In0.53Ga0.47As with ALD Al2O3 is discussed.
引用
收藏
页码:51 / 65
页数:15
相关论文
共 50 条
  • [1] Ge and III/V devices for advanced CMOS
    Heyns, Marc
    Adelmann, Christoph
    Brammertz, Guy
    Brunco, David
    Caymax, Matty
    De Jaeger, Brice
    Delabie, Annelies
    Eneman, Geert
    Houssa, Michel
    Lin, Dennis
    Martens, Koen
    Merckling, Clement
    Meuris, Marc
    Mittard, Jerome
    Penaud, Julien
    Pourtois, Geoffrey
    Scarrozza, Marco
    Simoen, Eddy
    Sioncke, Sonja
    Wang, Wei-E
    ULIS 2009: 10TH INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION OF SILICON, 2009, : 83 - 86
  • [2] Passivation challenges with Ge and III/V devices
    Sioncke, S.
    Lin, D.
    Nyns, L.
    Delabie, A.
    Thean, A.
    Horiguchi, N.
    Struyf, H.
    De Gendt, S.
    Caymax, M.
    GRAPHENE, GE/III-V, NANOWIRES, AND EMERGING MATERIALS FOR POST-CMOS APPLICATIONS 4, 2012, 45 (04): : 97 - 110
  • [3] Molecular beam epitaxy passivation studies of Ge and III-V semiconductors for advanced CMOS
    Merckling, C.
    Penaud, J.
    Kohen, D.
    Bellenger, F.
    Alian, A.
    Brammertz, G.
    El-Kazzi, M.
    Houssa, M.
    Dekoster, J.
    Caymax, M.
    Meuris, M.
    Heyns, M. M.
    MICROELECTRONIC ENGINEERING, 2009, 86 (7-9) : 1592 - 1595
  • [4] Nondestructive diagnostics of high-κ dielectrics for advanced electronic devices
    Dallera, Claudia
    Fracassi, Francesca
    Braicovich, Lucio
    Scarel, Giovanna
    Wiemer, Claudia
    Fanciulli, Marco
    Pavia, Giuseppe
    Cowie, Bruce C. C.
    APPLIED PHYSICS LETTERS, 2006, 89 (18)
  • [5] Passivation of Ge/high-κ interface using RF Plasma nitridation
    Dushaq, Ghada
    Nayfeh, Ammar
    Rasras, Mahmoud
    SEMICONDUCTOR SCIENCE AND TECHNOLOGY, 2018, 33 (01)
  • [6] Electrical and interfacial characterization of atomic layer deposited high-κ gate dielectrics on GaAs for advanced CMOS devices
    Dalapati, Goutam Kumar
    Tong, Yi
    Loh, Wei-Yip
    Mun, Hoe Keat
    Cho, Byung Jin
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2007, 54 (08) : 1831 - 1837
  • [7] Challenges for introducing Ge and III/V devices into CMOS technologies
    Heyns, M.
    Alian, A.
    Brammertz, G.
    Caymax, M.
    Eneman, G.
    Franco, J.
    Gencarelli, F.
    Groeseneken, G.
    Hellings, G.
    Hikavyy, A.
    Houssa, M.
    Kaczer, B.
    Lin, D.
    Loo, R.
    Merckling, C.
    Meuris, M.
    Mitard, J.
    Nyns, L.
    Sioncke, S.
    Vandervorst, W.
    Vincent, B.
    Waldron, N.
    Witters, L.
    2012 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM (IRPS), 2012,
  • [8] Epitaxial high-κ dielectrics on silicon
    Osten, HJ
    ASDAM 2004: THE FIFTH INTERNATIONAL CONFERENCE ON ADVANCED SEMICONDUCTOR DEVICES AND MICROSYSTEMS, 2004, : 155 - 162
  • [9] Si-SiO2 Interface to High-k-Ge/III-V Interface: Passivation and Reliability
    Misra, D.
    SILICON COMPATIBLE MATERIALS, PROCESSES, AND TECHNOLOGIES FOR ADVANCED INTEGRATED CIRCUITS AND EMERGING APPLICATIONS 3, 2013, 53 (03): : 69 - 84
  • [10] MOS interface and channel engineering for high-mobility Ge/III-V CMOS
    Takagi, S.
    Zhang, R.
    Kim, S. -H
    Taoka, N.
    Yokoyama, M.
    Suh, J. -K.
    Suzuki, R.
    Takenaka, M.
    2012 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM), 2012,