Spice equivalent circuit of a two-parallel-wires shielded cable for evaluation of the RF induced voltages at the terminations

被引：22

作者：

Antonini, G ^{[1
]}

Orlandi, A ^{[1
]}

机构：

[1] Univ Aquila, Dept Elect Engn, UAq EMC Lab, I-67040 Laquila, Italy

来源：

IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY | 2004年 / 46卷 / 02期

关键词：

SPICE model; transfer admittance; transfer impedance; two-wires shielded cable;

D O I：

10.1109/TEMC.2004.826887

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A SPICE circuit model is developed for the evaluation in frequency and time domain, of the common and differential mode voltages at the terminals of a two-parallel-wires shielded cable during a current injection test. The proposed circuit is an exact equivalent of the model's governing multiconductor transmission line equations without the need of any subdivision in elementary cells and takes into account the presence of both transfer impedance and admittance.

引用

页码：189 / 198

页数：10