A new NDA timing error detector for BPSK and QPSK with an efficient hardware implementation for ASIC-BASED and FPGA-based wireless receivers

This paper introduces and characterizes a new Non Data Aided (NDA) Timing Error Detector (TED) for symbol timing recovery PLLs in BPSK and QPSK receivers operating in AWGN channels. The detector necessitates only two samples per symbol, and a simple hardware structure is found for its computation process, which allows for an exceptionally compact implementation in an FPGA or ASIC. The detector will further be shown to be signal-level independent and hence extremely resistant to fading and to imperfections in the operation of the AGC circuit. In terms of tracking performance, that of the proposed detector will be shown to be better or comparable vs. that of the Gardner NDA TED and the Gardner Decision Directed TED.