Low-Power Low-Voltage ΔΣ Modulator Using Switched-Capacitor Passive Filters

被引:0
作者
Yeknami, Ali Fazli [1 ]
Alvandpour, Atila [2 ]
机构
[1] Oregon State Univ, Sch Elect Engn & Comp Sci, Corvallis, OR 97331 USA
[2] Linkoping Univ, Dept Elect Engn, S-58183 Linkoping, Sweden
来源
VLSI-SOC: AT THE CROSSROADS OF EMERGING TRENDS | 2015年 / 461卷
关键词
Passive integrator; Delta-sigma modulator; Low-voltage; Low-power; Active-passive modulator; Feedforward architecture;
D O I
10.1007/978-3-319-23799-2_5
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A low-voltage low-power fourth-order active-passive Delta Sigma modulator with one active stage is presented. The input-feedforward architecture is adopted, which improves the voltage swing prior to the quantizer. This enables a simpler comparator design and cascade of three passive filters. The passive integrator, as an alternate option to its power-hungry active counterpart, and the non-idealities associated with it are investigated. The active integrator used at the input stage provides most of the loop gain, which suppresses the thermal noise from the succeeding stages and minimizes the non-idealities in the comparator, such as noise and offset. The active integrator employs a two-stage amplifier with load compensation, whose DC-gain is boosted by a partially body-driven technique. The modulator, operated from a 0.7 V supply and clocked with 256 kHz sampling frequency, achieves 84 dB SNR and 80.3 dB SNDR over a 500 Hz signal bandwidth, while it dissipates only 400 nW power.
引用
收藏
页码:94 / 118
页数:25
相关论文
共 23 条
[1]   A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter [J].
Abo, AM ;
Gray, PR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1999, 34 (05) :599-606
[2]  
[Anonymous], DESIGN LOW VOLTAGE L
[3]  
[Anonymous], IEEE J SOLID STATE C
[4]  
[Anonymous], ISSCC
[5]  
[Anonymous], THESIS
[6]  
[Anonymous], IEEE NORCHIP C
[7]   A 0.25-mW low-pass passive sigma-delta modulator with built-in mixer for a 10-MHz IF input [J].
Chen, F ;
Leung, B .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (06) :774-782
[8]   Design and analysis of a CMOS passive I£a† ADC for low power RF transceivers [J].
Chen, Feng ;
Bakkaloglu, Bertan ;
Ramaswamy, Srinath .
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2009, 59 (02) :129-141
[9]   Managing subthreshold leakage in charge-based analog circuits with low-VTH transistors by analog T-switch (AT-switch) and super cut-off CMOs (SCCMOS) [J].
Ishida, K ;
Kanda, K ;
Tamtrakarn, A ;
Kawaguchi, H ;
Sakurai, T .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2006, 41 (04) :859-867
[10]  
Jun Wang, 2009, Proceedings of the 35th European Solid-State Circuits Conference. ESSCIRC 2009, P328, DOI 10.1109/ESSCIRC.2009.5325936