A CMOS 434/868 MHz FSK/OOK Transmitter with Integrated Fractional-N PLL

被引:1
作者
Zhao, Feng [1 ]
Gao, Xiaoping [1 ]
Zhang, Huajiang [1 ]
Hu, Kangmin [1 ]
Hong, Zhiliang [1 ]
机构
[1] Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China
来源
2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4 | 2008年
关键词
D O I
10.1109/APCCAS.2008.4746081
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A 434/868 MHz FSK/OOK transmitter with integrated PLL is reported. Direct digital modulation of a fully integrated Sigma-Delta fractional-N PLL frequency synthesizer is used to ensure fine frequency resolution and low phase noise. A wide-band VCO together with an Adaptive Frequency Calibration (AFC) is used to cover the desired bands. A differential-to-single output programmable power amplifier is integrated to make the chip low cost and low power. The measurement results show that the phase noise are -76dBc/Hz and -131dBc/Hz at 10-kHz offset and 3-MHz offset with carrier centered at 868 MHz, respectively. The peak output power of the transmitter is 3.5dBm on 50-Omega load and the measured adjacent channel power ratio (ACPR) for 100 kHz channel is less than -50-dBc. The chip is fabricated with 0.35-mu RF CMOS process. The 2-mm(2) transmitter IC including PILL and power amplifier (PA) consumes 87.6mW at 3V voltage supply.
引用
收藏
页码:546 / 549
页数:4
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