Design of loop filter in phase-locked loops

被引：15
|
作者：
Mirabbasi, S [1 ]
Martin, K [1 ]
机构：
[1] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada
来源：
ELECTRONICS LETTERS | 1999年 / 35卷 / 21期
关键词：
D O I：
10.1049/el:19991278
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An exact method for designing loop filters in third-order PLLs is presented. The method is simple and results in a PLL with superior loop dynamics and improved output jitter while maintaining the same loop bandwidth compared to that of a PLL designed using the conventional approach. The method is readily applicable to higher order PLLs.
引用
收藏
页码：1801 / 1802
页数：2
相关论文
共 50 条
  • [21] Design of Sub-Sampling Phase-Locked Loop with a Time-Based Loop Filter
    Chen, Tsung-Sheng
    Hsieh, Huai-Yuan
    Lu, Liang-Hung
    2021 IEEE INTERNATIONAL SYMPOSIUM ON RADIO-FREQUENCY INTEGRATION TECHNOLOGY (RFIT), 2021,
  • [22] Design and performance study of phase-locked loop using fractional-order loop filter
    Tripathy, Madhab Chandra
    Mondal, Debasmita
    Biswas, Karabi
    Sen, Siddhartha
    INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2015, 43 (06) : 776 - 792
  • [23] DESIGN OF TYPE 2 DIGITAL PHASE-LOCKED LOOPS
    ATKINSON, P
    ALLEN, AJ
    RADIO AND ELECTRONIC ENGINEER, 1975, 45 (11): : 657 - 666
  • [24] A design method for digital phase-locked loop
    Ru Jiyuan
    Liu Yujia
    Xue Wei
    PROCEEDINGS OF THE 2015 4TH NATIONAL CONFERENCE ON ELECTRICAL, ELECTRONICS AND COMPUTER ENGINEERING ( NCEECE 2015), 2016, 47 : 1471 - 1475
  • [25] Design of phase-locked loops for digital signal processors
    Leonov, Gennadii
    Seledzhi, Svetlana
    INTERNATIONAL JOURNAL OF INNOVATIVE COMPUTING INFORMATION AND CONTROL, 2005, 1 (04): : 779 - 789
  • [26] INTERFERENCES IN PHASE-LOCKED LOOPS
    BLANCHARD, A
    IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS, 1974, AE10 (05) : 686 - 697
  • [27] Synchronization design of a coupled phase-locked loop
    Buckwalter, JF
    Heath, TH
    York, RA
    IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, 2003, 51 (03) : 952 - 960
  • [28] DESIGN OF PHASE-LOCKED LOOP WITH TIME DELAY
    KURAMOTO, M
    HIRADE, K
    REVIEW OF THE ELECTRICAL COMMUNICATIONS LABORATORIES, 1970, 18 (11-1): : 796 - &
  • [29] PHASE-LOCKED LOOPS AND SAMPLING
    REY, TJ
    PROCEEDINGS OF THE INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS, 1971, 59 (09): : 1357 - &
  • [30] CHAOS IN PHASE-LOCKED LOOPS
    CHOU, JH
    CHU, YH
    CHANG, S
    ELECTRONICS LETTERS, 1991, 27 (09) : 750 - 751
12345