Design of loop filter in phase-locked loops

被引：15

作者：

Mirabbasi, S ^{[1
]}

Martin, K ^{[1
]}

机构：

[1] Univ Toronto, Dept Elect & Comp Engn, Toronto, ON M5S 3G4, Canada

来源：

ELECTRONICS LETTERS | 1999年 / 35卷 / 21期

关键词：

D O I：

10.1049/el:19991278

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

An exact method for designing loop filters in third-order PLLs is presented. The method is simple and results in a PLL with superior loop dynamics and improved output jitter while maintaining the same loop bandwidth compared to that of a PLL designed using the conventional approach. The method is readily applicable to higher order PLLs.

引用

页码：1801 / 1802

页数：2