Simple true random number generator for any semi-conductor technology

被引:7
|
作者
Boehl, Eberhard
机构
关键词
random number generation; field programmable gate arrays; logic gates; semiconductor technology; true random number generators; TRNG; ring oscillators; XOR compression; FPGA implementations; digital library elements; digital design flow; sampling frequency; compression coefficient;
D O I
10.1049/iet-cdt.2014.0029
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
True random number generators (TRNGs) are needed in cryptography for key generation, in challenge response authentication procedures and for countermeasures against power analysis attacks. Such true randomness requires to utilise random physical hardware effects. It is the goal to make the TRNG usable for different semi-conductor technologies (including field programmable gate arrays (FPGAs)). This approach is based on ring oscillators with multiple taps in combination with a simple post processing by exclusive OR antivalence (XOR) compression. Verifications with a test chip and several FPGA implementations showed that standard digital library elements and the digital design flow can be used without any constraints for compilation and special layout rules. A proper choice of sampling frequency and compression coefficient ensures a random output with extremely low bias for different technologies which can be checked on-line easily. It was shown that for passing the on-line test with a given bias limit the generated random data passes the statistical tests.
引用
收藏
页码:239 / 245
页数:7
相关论文
共 50 条
  • [31] Experimental Analyses of a Noise-Based True Random Number Generator
    Adesina, Naheem Olakunle
    Wang, Baorui
    Morell, William
    Khan, Md Azmot Ullah
    2023 IEEE 13TH ANNUAL COMPUTING AND COMMUNICATION WORKSHOP AND CONFERENCE, CCWC, 2023, : 915 - 918
  • [32] Opto-Radio Noise based True Random Number Generator
    Kumar, Dhirendra
    Jadhav, Chaitanya Dnyaneshwar
    Misra, Prasanna Kumar
    Swami, Manish Go
    2020 24TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2020,
  • [33] Reconfigurable Side Channel Attack resistant True Random Number Generator
    Bahadur, Vijay
    Selvakumar, David
    Vijendran, N.
    Sobha, P. M.
    2016 INTERNATIONAL CONFERENCE ON VLSI SYSTEMS, ARCHITECTURES, TECHNOLOGY AND APPLICATIONS (VLSI-SATA), 2016,
  • [34] FPGA design of an Open-Loop True Random Number Generator
    Lozac'h, Florent
    Ben-Romdhane, Molka
    Graba, Tarik
    Danger, Jean-Luc
    16TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2013), 2013, : 615 - 622
  • [35] True random number generator with a metastability-based quality control
    Tokunaga, Carlos
    Blaauw, David
    Mudge, Trevor
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (01) : 78 - 85
  • [36] True random number generator based on ring oscillator PUF circuit
    Buchovecka, Simona
    Lorencz, Robert
    Kodytek, Filip
    Bucek, Jiri
    MICROPROCESSORS AND MICROSYSTEMS, 2017, 53 : 33 - 41
  • [37] FPGA Implementation of Metastability-Based True Random Number Generator
    Hata, Hisashi
    Ichiawa, Shuichi
    IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 2012, E95D (02): : 426 - 436
  • [38] A High Speed All-Digital True Random Number Generator
    Jiang, Jianfei
    Guan, Nin
    Wang, Qin
    Li, Chaoyang
    2018 14TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT), 2018, : 275 - 277
  • [39] Solution-Processed Carbon Nanotube True Random Number Generator
    Rojas, William A. Gaviria
    McMorrow, Julian J.
    Geier, Michael L.
    Tang, Qianying
    Kim, Chris H.
    Marks, Tobin J.
    Hersam, Mark C.
    NANO LETTERS, 2017, 17 (08) : 4976 - 4981
  • [40] An Asynchronous and Low-Power True Random Number Generator Using STT-MTJ
    Perach, Ben
    Kvatinsky, Shahar
    2020 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2020,