ESD protection of RF circuits in standard CMOS process

被引：0

作者：

Higashi, K ^{[1
]}

Adan, AO ^{[1
]}

Fukumi, M ^{[1
]}

Tanba, N ^{[1
]}

Yoshimasu, T ^{[1
]}

Hayashi, M ^{[1
]}

机构：

[1] Sharp Co Ltd, IC Dev Grp, Design Technol Dev Ctr, Tenri, Nara 6328567, Japan

来源：

2002 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS | 2002年

关键词：

D O I：

10.1109/RFIC.2002.1012050

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The tradeoffs in the ESD protection device for RFCMOS circuits are described, and the characteristics of an SCR-based ESD structure are presented. The parasitic capacitance of the ESD structure is reduced to similar to150fF. 3kV HBM and 750V CDM are achieved in a LNA working at 2.5GHz with NF<4dB, applicable for Bluetooth wireless transceiver.

引用

页码：285 / 288

页数：4