An ultracompact, 2-cc-size, low-power 2.5-Gb/s optical receiver module incorporating an MU receptacle

被引:4
作者
Hirose, M [1 ]
Ishihara, N
Akazawa, Y
Ichino, H
机构
[1] NTT, Elect, Kanagawa 2430432, Japan
[2] NTT, Photon Labs, Kanagawa 2430198, Japan
[3] NTT, Network Innovat Labs, Kanagawa 2390847, Japan
关键词
adjustment free; bipolar transistor; optical receiver; phase-lock loop (PLL); synchronous digital hierarchy synchronous optical network (SDH/SONET); offset;
D O I
10.1109/50.803029
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper describes an ultracompact, -3-V-supply, 2.5-Gb/s optical receiver module. For miniaturization of a gigabit class receiver module, we used multichip configuration and bump technology, and me incorporated a miniature unit-coupling (MU) receptacle for small-size optical interface. To eliminate required external adjustment devices in the module for reduction of module size and assembling cost, me introduced new circuit techniques; the multistage automatic offset canceling technique is used for the postamplifier, and the sample-and-hold phase-locked loop (PLL) technique is employed for the clock and data recovery circuits. All the IC's mere designed to operate at a low DC power supply of -3 V. The IC current was reduced by using 0.5-mu m Si bipolar process technology. The volume is only 2 cc (9 x 30.3 x 7.7 mm(3)), including the MU receptacle. The experimental, results show that the receiver has a wide dynamic range, from more than -2 to -19.4 dBm in optical input, These results mere obtained without making any external adjustments. The module consumes a total power of 0.64 W.
引用
收藏
页码:2349 / 2355
页数:7
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