Complete 3D-Reduced Surface Field Superjunction Lateral Double-Diffused MOSFET Breaking Silicon Limit

被引:37
作者
Duan, Baoxing [1 ]
Cao, Zhen [1 ]
Yuan, Song [1 ]
Yang, Yintang [1 ]
机构
[1] Xidian Univ, Sch Microelect, Key Lab Wide Band Gap Semicond Mat & Devices, Minist Educ, Xian 710071, Peoples R China
关键词
Super junction; SIPOS; LDMOS; silicon limit; ON-RESISTANCE; LDMOS; COMPENSATION;
D O I
10.1109/LED.2015.2493080
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new superjunction lateral double-diffused MOS with the semi-insulating poly silicon (SIPOS SJ-LDMOS) has been proposed in this letter, for the first time, with the complete three-dimensional reduced surface field (3D-RESURF). The SIPOS SJ-LDMOS along the three dimensions are subject to the electric field modulation, which achieves the complete 3D-RESURF effect. The simulated breakdown voltage (BV) for the unit length of the drift region is improved to 19.4 V/mu m. The drift region with the high concentration compared with the conventional LDMOS can be depleted completely in the OFF-state to obtain the high BV. Moreover, the majority carrier accumulation can be formed to further decrease R-ON,R-sp (specific on resistance) during the ON-state operation. Three effects have been combined to SIPOS SJ-LDMOS for the superjunction ideal, electric field modulation and the majority carrier accumulation by SIPOS. The tradeoff between the BV and R-ON,R-sp has been improved to break through the silicon limit. The results show that the experimental R-ON,R-sp of SIPOS SJ-LDMOS is 18 m Omega . cm(2) with the tested BV of 376 V, which is less than that of 31.1 m Omega . cm(2) for the N-buffer SJ-LDMOS with the simulated BV of 287 V, and far less than 71.8 m Omega . cm(2) for the conventional LDMOS with the simulated BV of 254 V for the same drift region length of 20 mu m.
引用
收藏
页码:1348 / 1350
页数:3
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