Effect of gate profile on the characteristics of 0.5μm GaAs MESFETs

被引：0

作者：

Naik, AA ^{[1
]}

Rawal, DS ^{[1
]}

Prabhakar, S ^{[1
]}

Saravanan, GS ^{[1
]}

Sehgal, BK ^{[1
]}

Gulati, R ^{[1
]}

Vyas, HP ^{[1
]}

Kumar, R ^{[1
]}

Suryanarayana, P ^{[1
]}

Rao, AVSK ^{[1
]}

Govindacharyulu, PA ^{[1
]}

机构：

[1] Solid State Phys Lab, Delhi, India

来源：

PROCEEDINGS OF THE ELEVENTH INTERNATIONAL WORKSHOP ON THE PHYSICS OF SEMICONDUCTOR DEVICES, VOL 1 & 2 | 2002年 / 4746卷

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this study, 0.5mum gates were defined by i-line (365mn) lithography using three different techniques viz. (i) single layer resist with strict process control, (ii) single layer resist with post exposure chlorobenzene soak and (iii) bi-layer resist structure with several thickness combinations. Various photolithography parameters were studied to obtain profile suitable for good clean gates with uniform lift-off on a 3-inch GaAs wafer. The effect of gate profile on physical and electrical parameters of MESFET was also studied. It is shown that an undercut profile suitable for good liftoff yield can be reproducibly obtained by use of the bi-layer resist system. Finally fully ion-implanted low noise GaAs MESFETs with 0.5mum Ti/Pt/Au gate have been successfully developed with f(T) similar to 26.5 GHz.

引用

页码：1148 / 1151

页数：4

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