Self-Aligned Silicide Gate GaN MISFETs with Normally-Off Operation

We demonstrate normally-off GaN MISFETs made by utilizing self alignment process using ion implantation and precisely controlled silicidation gate technologies. The fabrication technology is based on the silicon MOSFET process, but specific refined GaN device fabrication technology has been developed. The self-aligned structures enable us to reduce source and drain parasitic resistance, which expect to improve in device characteristics. To form shallow source and drain junctions which suppress the short channel effects, we selected the very low implantation energy of 30keV. The GaN MISFETs obtained I-dss of 150 mA/mm, g(rnmax) of 14 mS/mm and threshold voltage of +0.92 V. The I-dss and g(mmax) are the highest value for the conventional GaN MISFETs ever reported.