Deadline and energy aware dynamic task mapping and scheduling for Network-on-Chip based multi-core platform

被引:20
作者
Chatterjee, Navonil [1 ]
Paul, Suraj [1 ]
Mukherjee, Priyajit [1 ]
Chattopadhyay, Santanu [1 ]
机构
[1] Indian Inst Technol, Dept Elect & Elect Commun Engn, Kharagpur 721302, W Bengal, India
关键词
Network-on-Chip; Dynamic mapping and scheduling; Communication energy; Deadline; TIME; ALLOCATION; ALGORITHMS; GRAPHS;
D O I
10.1016/j.sysarc.2017.01.008
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Task allocation and scheduling is a challenging problem in Network-on-Chip (NoC) based multi-core systems. It affects the performance of the application in terms of energy consumption and timing. The complexity of the problem increases further for dynamic scenarios where new applications can arrive in the multi-core platform at any time instant. In real-time systems, validity of computation is dependent on both the correctness of the result and temporal constraint satisfactio'n. Although a significant amount of work has been done in this domain, existing algorithms either ignore task scheduling or assume an as-soon-as possible scheduling strategy when determining task allocation at design-time. In this paper, we propose an improved deadline and energy aware dynamic task mapping and scheduling algorithm for multi-core platform. A detailed evaluation of the performance of the proposed algorithin has been conducted for different types of applications. The simulation results show that the use of task slack time while allocating tasks to processing elements can produce on an average 28% reduction in communication energy, compared to communication-aware packing based nearest neighbour algorithm. For real-time dynamic scenarios, the proposed algorithm performs an intelligent resource allocation which fmproves the rate of deadline satisfaction for the applications. We have also augmented the proposed algorithm to incorporate task migration for further improvement in the quality of solution. (C) 2017 Elsevier B.V. All rights reserved.
引用
收藏
页码:61 / 77
页数:17
相关论文
共 40 条
[1]  
Ali HIAA, 2013, IEEE INT CONF EMBED, P201, DOI 10.1109/RTCSA.2013.6732220
[2]  
Al Faruque MA, 2008, DES AUT CON, P760
[3]  
[Anonymous], RES REV J ECOLOGY EN, DOI DOI 10.1145/2463209.2488734
[4]  
[Anonymous], 2007, WILEY SERIES PARALLE
[5]  
[Anonymous], 2013, 50 ACM EDAC IEEE DES, DOI DOI 10.1145/2463209.2488734
[6]  
[Anonymous], 1990, COMPUT INTRACTABILIT
[7]  
[Anonymous], 17 IFIP INT C VER LA
[8]  
Arpaci-Dusseau R.H., 2015, OPERATING SYSTEMS 3, V0.91
[9]   Networks on chips: A new SoC paradigm [J].
Benini, L ;
De Micheli, G .
COMPUTER, 2002, 35 (01) :70-+
[10]   From UML specifications to mapping and scheduling of tasks into a NoC, with reliability considerations [J].
Bolanos, F. ;
Rivera, F. ;
Aedo, J. E. ;
Bagherzadeh, N. .
JOURNAL OF SYSTEMS ARCHITECTURE, 2013, 59 (07) :429-440