Termination sequence generation circuits for low-density parity-check convolutional codes

被引：11

作者：

Bates, Stephen ^{[1
]}

Elliott, Duncan G. ^{[1
]}

Swamy, Ramkrishna ^{[1
]}

机构：

[1] Univ Alberta, Dept Elect & Comp Engn, Edmonton, AB T6G 2V4, Canada

来源：

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS | 2006年 / 53卷 / 09期

基金：

加拿大自然科学与工程研究理事会;

关键词：

coding and decoding; data communication; error correction codes; linear algebra; packet switching;

D O I：

10.1109/TCSI.2006.880313

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Low-density parity-check convolutional codes (LDPC-CCs) complement their popular block-oriented counterparts and may be more suitable in certain communication applications. These include streaming voice, video, and packet switching networks. In order to use these codes efficiently we must generate termination sequences similar to those used in conventional convolutional codes. In this paper, we present a construction method for termination sequence generation circuits suitable for field-programmable gate arrays and application-specific integrated circuits. This method uses linear algebra to determine the termination sequence for a small number of states of the encoder and converts these solutions into a sequential circuit. Results are presented for several realizations of termination circuits for a (128,3,6) LDPC-CC.

引用

页码：1909 / 1917

页数：9

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