Fast 4-2 Compressor of Booth Multiplier Circuits for High-Speed RISC Processor

We use different XOR circuits to optimize the XOR structure 4-2 compressor, and design the transmission gates(TG) 4-2 compressor use single to dual rail circuit configurations. The maximum propagation delay, the power consumption and the layout area of the designed 4-2 compressors are simulated with 0.35 mu m and 0.25 mu m CMOS process parameters and compared with results of the synthesized 4-2 circuits, and show that the designed 4-2 compressors are faster and area smaller than the synthesized one.