FPGA based practical implementation of NPC-MLI with SVPWM for an autonomous operation PV system with capacitor balancing

This paper presents the field programmable gate array (FPGA) based capacitor imbalancing control scheme of neutral point clamped multilevel inverters (NPC-MLI) for standalone autonomous Photovoltaic (PV) system using innovative space vector PWM (SVPWM) scheme. The suggested vector selection based PWM offers an excellent performance to NPC-MU to control the capacitor balancing by using selected three vector (SIV) scheme. The inverter is getting input source from the PV system and the maximum power point tracking (MPFT) is capable of extracting maximum power from the PV array connected to DC-link. The real time perturb and observe (P&O) algorithm is used for tracking the maximum power point (MPP) of a Photo-voltaic (PV) generator. A Microcontroller PIC 16F876 is operated for the MPFT control algorithm. The entire inverter control algorithm is developed and designed using the very high-speed description language (VHDL) and implemented on Xilinx SPARTAN-III 3AN-XC3S400FPGA processor. The developed scheme is verified and tested via detailed simulations and experiments for 2 kW NPC-MLI fed three-phase induction motor. The simulation and experimental results are compared to previous studies. The proposed scheme offers an excellent performance with significant result in lowest % npf and THD obtained at 0.22% and 7.4% respectively and also enables the inverter to operate under unhinged PV conditions comprehensively. (C) 2014 Elsevier Ltd. All rights reserved.