An Energy-Efficient Time-Domain Incremental Zoom Capacitance-to-Digital Converter

被引:24
|
作者
Tang, Xiyuan [1 ]
Li, Shaolan [2 ]
Yang, Xiangxing [1 ]
Shen, Linxiao [3 ]
Zhao, Wenda [1 ]
Williams, Randall P. [1 ]
Liu, Jiaxin [4 ]
Tan, Zhichao [5 ]
Hall, Neal A. [1 ]
Pan, David Z. [1 ]
Sun, Nan [1 ]
机构
[1] Univ Texas Austin, Dept Elect & Comp Engn, Austin, TX 78712 USA
[2] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30313 USA
[3] Silicon Labs Inc, Austin, TX 78701 USA
[4] Tsinghua Univ, Dept Elect Engn, Beijing 100084, Peoples R China
[5] Zhejiang Univ, Sch Microelect, Hangzhou 310027, Peoples R China
关键词
Delta Sigma modulator; capacitance sensing; capacitance-to-digital converter (CDC); time-domain (TD) operation; voltage-controlled oscillator (VCO); VCO-BASED INTEGRATOR; DELTA-SIGMA ADC; PRESSURE; BANDWIDTH; CHAIN;
D O I
10.1109/JSSC.2020.3005812
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article presents an incremental two-step capacitance-to-digital converter (CDC) with a time-domain Delta Sigma modulator (TD Delta Sigma M). Unlike the classic two-step CDCs, this work replaces the operational transconductance amplifier (OTA)-based active-RC integrator by a voltage-controlled oscillator (VCO)-based integrator, which is mostly digital and low-power. Featuring the infinite dc gain and intrinsic quantization in phase domain, this TD Delta Sigma M enables a CDC design achieving 76-dB SNDR while requiring only a first-order loop, and a low oversampling ratio (OSR) of 15. Fabricated in 40- nm CMOS technology, the prototype CDC achieves a resolution of 0.29 fF while dissipating only 0.083 nJ/conversion, which improves the energy efficiency by over two times comparing to the similar performance designs.
引用
收藏
页码:3064 / 3075
页数:12
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