A Novel Layout-Based Single Event Transient Injection Approach to Evaluate the Soft Error Rate of Large Combinational Circuits in Complimentary Metal-Oxide-Semiconductor Bulk Technology

被引:26
作者
Du, Yankang [1 ]
Chen, Shuming [1 ]
机构
[1] Natl Univ Def Technol, Natl Lab Parallel & Distributed Proc, Changsha 410073, Hunan, Peoples R China
基金
中国国家自然科学基金;
关键词
Grid-based; layout-based; single-event transient; soft error rate; strike location;
D O I
10.1109/TR.2015.2427372
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
As the technology scales down, space radiation induced soft errors are becoming a critical issue for the reliability of Integrated Circuits (ICs). In this paper, we propose a novel layout-based Single-Event Transient (SET) injection approach to evaluate the Soft Error Rate (SER) of large combinational circuits in Complementary Metal-Oxide-Semiconductor (CMOS) bulk technology. We consider the effect of ion strike location on the SET pulse width in this approach. Heavy-ion experiments on two different inverter chains are conducted to verify this layout-based SET injection approach. The simulation and experiment results show that this approach can fairly reflect the SET pulse width distribution. Furthermore, we compare the soft error number calculated by our proposed layout-based approach with the normal SET injection approach, and illustrate the detailed circuit response obtained by our proposed approach.
引用
收藏
页码:248 / 255
页数:8
相关论文
共 38 条
[1]   Influence of N-Well Contact Area on the Pulse Width of Single-Event Transients [J].
Ahlbin, J. R. ;
Atkinson, N. M. ;
Gadlage, M. J. ;
Gaspard, N. J. ;
Bhuva, B. L. ;
Loveless, T. D. ;
Zhang, E. X. ;
Chen, L. ;
Massengill, L. W. .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2011, 58 (06) :2585-2590
[2]   The Effect of Layout Topology on Single-Event Transient Pulse Quenching in a 65 nm Bulk CMOS Process [J].
Ahlbin, J. R. ;
Gadlage, M. J. ;
Ball, D. R. ;
Witulski, A. W. ;
Bhuva, B. L. ;
Reed, R. A. ;
Vizkelethy, G. ;
Massengill, L. W. .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2010, 57 (06) :3380-3385
[3]   Single-Event Transient Pulse Quenching in Advanced CMOS Logic Circuits [J].
Ahlbin, Jonathan R. ;
Massengill, Lloyd W. ;
Bhuva, Bharat L. ;
Narasimham, Balaji ;
Gadlage, Matthew J. ;
Eaton, Paul H. .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2009, 56 (06) :3050-3056
[4]  
Amusan O. A., 2006, THESIS VANDERBILT U
[5]   Charge collection and charge sharing in a 130 nm CMOS technology [J].
Amusan, Oluwole A. ;
Witulski, Arthur F. ;
Massengill, Lloyd W. ;
Bhuva, Bharat L. ;
Fleming, Patrick R. ;
Alles, Michael L. ;
Sternberg, Andrew L. ;
Black, Jeffrey D. ;
Schrimpf, Ronald D. .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2006, 53 (06) :3253-3258
[6]   Using Single Error Correction Codes to Protect Against Isolated Defects and Soft Errors [J].
Argyrides, Costas ;
Reviriego, Pedro ;
Antonio Maestro, Juan .
IEEE TRANSACTIONS ON RELIABILITY, 2013, 62 (01) :238-243
[7]   Layout Technique for Single-Event Transient Mitigation via Pulse Quenching [J].
Atkinson, Nicholas M. ;
Witulski, Arthur F. ;
Holman, W. Timothy ;
Ahlbin, Jonathan R. ;
Bhuva, Bharat L. ;
Massengill, Lloyd W. .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2011, 58 (03) :885-890
[8]   Investigation of the Propagation Induced Pulse Broadening (PIPB) Effect on Single Event Transients in SOI and Bulk Inverter Chains [J].
Cavrois, V. Ferlet ;
Pouget, V. ;
McMorrow, D. ;
Schwank, J. R. ;
Fel, N. ;
Essely, F. ;
Flores, R. S. ;
Palliet, P. ;
Gaillardin, M. ;
Kobayashi, D. ;
Melinger, J. S. ;
Duhamel, O. ;
Dodd, P. E. ;
Shaneyfelt, M. R. .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2008, 55 (06) :2842-2853
[9]  
Chatterjee I., 2012, P IEEE INT REL PHYS
[10]   Calculating the Soft Error Vulnerabilities of Combinational Circuits by Re-Considering the Sensitive Area [J].
Chen, Shuming ;
Du, Yankang ;
Liu, Biwei ;
Qin, Junrui .
IEEE TRANSACTIONS ON NUCLEAR SCIENCE, 2014, 61 (01) :646-653