Full transceiver circuit simulation using VHDL-AMS

This paper describes the successful simulation of a complete transceiver circuit with the new VHDL-AMS standard using the ADVanceMS mixed-signal simulator from Mentor Graphics. The goal of STMicroelectronics was to verify the functionality and connectivity of a complete RF transceiver chip under actual application conditions. The transceiver circuit named AFRICA is dedicated to E-GSM/GPRS standards for mobile phone applications. At such a level of complexity traditional tools do not allow simulation of the design at transistor level. In addition to digital models, mixed-signal behavioral models of the transmitter, receiver and frequency synthesizer have been developed for a high level of abstraction, as required in a top-down methodology. The complete simulation of the chip took only 23 minutes of CPU time for 6ms of circuit operation. For the first time we were able to verify and debug such a circuit at the top-level. Mixed-signal simulation now allows full chip verification and paves the way for a more efficient test program development.