Modeling and analysis of gate-all-around silicon nanowire FET

被引：31

作者：

Chen, Xiangchen ^{[1
]}

Tan, Cher Ming ^{[1
]}

机构：

[1] Nanyang Technol Univ, Dept Elect & Elect Engn, Singapore 639798, Singapore

来源：

MICROELECTRONICS RELIABILITY | 2014年 / 54卷 / 6-7期

关键词：

MOSFETS;

D O I：

10.1016/j.microrel.2013.12.009

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we report the TCAD study on gate-all-around (GM) silicon nanowire (SiNW) FET. The device carrier transport physics, self-heating effect and process induced stress effect are discussed. With a comparison study between GM SiNW FET and FinFET, the advantages of GAA SiNW FET on gate controllability and short channel effect immunity are evaluated. (C) 2013 Elsevier Ltd. All rights reserved.

引用

页码：1103 / 1108

页数：6

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