PI Timing Measurements in High Speed Flash Memory Embedded Systems

This paper presents a case study on how to prevent the power distribution network's performance of a flash memories related to setup and hold times violations. We first review different high-speed factors [1], and point out how data timing can influence power distribution networks (PDNs) at frequencies in the range of megahertz. Experimental results show that even by applying usual PI recommendations could not solve the errors that appear on the supply voltage and in data waveforms, errors that could lead to incorrect values at the output of the NOR flash memory.