Reconfigurable Fault Tolerant Processor on a SRAM based FPGA

The hardware of the satellite system is mission-critical of the whole system. The commercial off-the-shelf (COTS) components are commonly used in satellite systems due to their low cost. They are not hardened to withstand the space-born radiation, and thus, may fail, jeopardizing the entire mission. In low-cost satellite systems such as CubeSat, the reliability of the system can be greatly enhanced by applying fault tolerant design to the hardware architectures. This paper developed a configurable fault-tolerant system which consists of a majority voter circuit designed for masking and elimination of the induced soft errors and a memory scrubbing block designed to correct the faults induced and prevent systemfailure.