Evaluation of Normally-off SiC JFET for a High Power Density Matrix Converter

被引：0

作者：

Safari, Saeed ^{[1
]}

Castellazzi, Alberto ^{[1
]}

Wheeler, Pat ^{[1
]}

机构：

[1] Univ Nottingham, Sch Elect & Elect Engn, Nottingham NG7 2RD, England

来源：

2012 15TH INTERNATIONAL POWER ELECTRONICS AND MOTION CONTROL CONFERENCE (EPE/PEMC) | 2012年

关键词：

normally-off SiC JFET; losses evaluation; matrix converter;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

With the commercial availability of SiC JFET, its acceptance is expected grows in consideration to the excellent low switching loss, high temperature operation and high voltage rating capabilities of these devices. This paper presents the possibility of building a matrix converter using normally-off SiC JFET. Firstly, the paper demonstrates a gate drive circuit for normally-off SiC JFET taking into account the special demands for this device and then performance of it is investigated in a matrix converter. Furthermore, a theoretical investigation of the power losses of a matrix converter with normally-off SiC JFET and Si IGBT is described. The losses estimation indicates that a 7 KW matrix converter would potentially have an efficiency of approximately 96% if equipped with SiC device.

引用

页数：7

共 13 条

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