Timing trigger and control interface module for atlas SCT read out electronics

被引：0

作者：

Butterworth, J ^{[1
]}

Hayes, D ^{[1
]}

Lane, J ^{[1
]}

Postranecky, M ^{[1
]}

机构：

[1] Univ Coll London, Dept Phys & Astron, London WC1E 6BT, England

来源：

PROCEEDINGS OF THE FIFTH WORKSHOP ON ELECTRONICS FOR LHC EXPERIMENTS | 1999年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The SCT detector interfaces with the ATLAS Level 1 using the LHC-wide TTC (Timing, Trigger, and Control) system. The design of the TIM ( TTC Interface Module), part of the SCT off-detector electronics [ 1 ], and the interface with the RODs ( Read Out Drivers), is described. Also described is the forerunner of the TIM, the CLOAC ( Clock And Control) MASTER module, developed to provide a stand-alone timing and trigger capability in the absence of the TTC system. CLOACs are currently used in the SCT tests at CERN. They are also available to the SCT community for use in front-end modules testing.

引用

页码：336 / 340

页数：5