Study On Charge Trap Layers In Charge Trap Metal-Oxide-Semiconductor Field Effect Transistor

被引：2

作者：

Cho, Seung Su ^{[1
]}

Joo, Kyong Hee ^{[2
]}

Yeo, In-Seok ^{[2
]}

Chung, Ilsub ^{[1
]}

机构：

[1] Sungkyunkwan Univ, Sch Informat & Commun Engn, Suwon 440746, South Korea

[2] Samsung Elect Co Ltd, Proc Dev Team, Memory Div, Semicond Business, Yongin 449177, Gyeonggi Do, South Korea

来源：

JAPANESE JOURNAL OF APPLIED PHYSICS | 2009年 / 48卷 / 02期

关键词：

MEMORY; SILICON;

D O I：

10.1143/JJAP.48.021201

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

In this study, we have investigated the two types of charge trap devices in terms of performance and reliability. Either a silicon rich oxide (SRO) layer or a silicon rich oxynitride (SRON) trap layer was used as a charge trap layer. The trap layers were deposited by atomic layer deposition (ALD). The transistor with an SRO trap layer combined with a 3.5-nm-thick tunneling oxide layer yields the best electrical properties in terms of speed and retention. The device with an SRON trap layer yields slower programming/erasing behaviors and a lower retention owing to noncrystallites in the SRON thin film. (C) 2009 The Japan Society of Applied Physics

引用

页数：4

共 16 条

[1]

Baik SJ, 2003, 2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, P545

[2]

CHEN YY, 1999, INT S VLSI TECHN SYS, P86

[3] Performance and reliability features of advanced nonvolatile memories based on discrete traps (silicon nanocrystals, SONOS) [J].

De Salvo, B ;

Gerardi, C ;

van Schaijk, R ;

Lombardo, SA ;

Corso, D ;

Plantamura, C ;

Serafino, S ;

Ammendola, G ;

van Duuren, M ;

Goarin, P ;

Mei, WY ;

van der Jeugd, K ;

Baron, T ;

Gély, M ;

Mur, P ;

Deleonibus, S .

IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2004, 4 (03) :377-389

[4] Excess silicon at the silicon nitride/thermal oxide interface in oxide-nitride-oxide structures [J].

Gritsenko, VA ;

Wong, H ;

Xu, JB ;

Kwok, RM ;

Petrenko, IP ;

Zaitsev, BA ;

Morokov, YN ;

Novikov, YN .

JOURNAL OF APPLIED PHYSICS, 1999, 86 (06) :3234-3240

[5] Dielectric breakdown and Poole-Frenkel field saturation in silicon oxynitride thin films [J].

Habermehl, S ;

Apodaca, RT .

APPLIED PHYSICS LETTERS, 2005, 86 (07) :1-3

[6]

JOO KH, 2005, IEDM, P865

[7] CHEMICAL-COMPOSITION, CHARGE TRAPPING, AND MEMORY PROPERTIES OF OXYNITRIDE FILMS FOR MNOS DEVICES [J].

KAPOOR, VJ ;

BAILEY, RS ;

TURI, RA .

JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1990, 137 (11) :3589-3596

[8] Effects of floating-gate interference on NAND flash memory cell operation [J].

Lee, JD ;

Hur, SH ;

Choi, JD .

IEEE ELECTRON DEVICE LETTERS, 2002, 23 (05) :264-266

[9] Metal nanocrystal memory with high-κ tunneling barrier for improved-pata retention [J].

Lee, JJ ;

Kwong, DL .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2005, 52 (04) :507-511

[10] Ab initio study on oxidized silicon clusters and silicon nanocrystals embedded in SiO2:: Beyond the quantum confinement effect -: art. no. 035340 [J].

Luppi, M ;

Ossicini, S .

PHYSICAL REVIEW B, 2005, 71 (03)

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