ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUs

被引:33
作者
Lin, Yibo [1 ]
Li, Wuxi [2 ]
Gu, Jiaqi [3 ]
Ren, Haoxing [4 ]
Khailany, Brucek [4 ]
Pan, David Z. [3 ]
机构
[1] Peking Univ, Sch Elect Engn & Comp Sci, Ctr Energy Efficient Comp & Applicat, Beijing 100871, Peoples R China
[2] Xilinx Inc, FPGA Implementat Software Grp, San Jose, CA 95124 USA
[3] Univ Texas Austin, Dept Elect & Comp Engn, Austin, TX 78731 USA
[4] NVIDIA Corp, Austin, TX 78717 USA
关键词
Graphic processing unit (GPU) acceleration; linear assignment problem (LAP); physical design; very-large-scale integrated (VLSI) placement; ALGORITHM; EFFICIENT;
D O I
10.1109/TCAD.2020.2971531
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Placement is an important step in modern verylarge-scale integrated (VLSI) designs. Detailed placement is a placement refining procedure intensively called throughout the design flow, thus its efficiency has a vital impact on design closure. However, since most detailed placement techniques are inherently greedy and sequential, they are generally difficult to parallelize. In this article, we present a concurrent detailed placement framework, ABCDPlace, exploiting multithreading and graphic processing unit (GPU) acceleration. We propose batch-based concurrent algorithms for widely adopted sequential detailed placement techniques, such as independent set matching, global swap, and local reordering. The experimental results demonstrate that ABCDPlace can achieve 2x -5x faster runtime than sequential implementations with multithreaded CPU and over 10x with GPU on ISPD 2005 contest benchmarks without quality degradation. On larger industrial benchmarks, we show more than 16x speedup with GPU over the state-of-the-art sequential detailed placer. ABCDPlace finishes the detailed placement of a 10-million-cell industrial design in 1 min.
引用
收藏
页码:5083 / 5096
页数:14
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