Implementation and Validation of Advanced Unintentional Islanding Testing Using Power Hardware-in-the-Loop (PHIL) Simulation

被引:0
|
作者
Lundstrom, Blake [1 ]
Mather, Barry [1 ]
Shirazi, Mariko [1 ]
Coddington, Michael [1 ]
机构
[1] Natl Renewable Energy Lab, Golden, CO 80401 USA
关键词
unintentional islanding; power hardware-in-the-loop (PHIL); hardware-in-the-loop (HIL); inverter; interconnection; IEEE Std 1547; loss-of-mains; photovoltaic (PV); high penetration;
D O I
暂无
中图分类号
TE [石油、天然气工业]; TK [能源与动力工程];
学科分类号
0807 ; 0820 ;
摘要
Unprecedented investment in new renewable power (especially solar photovoltaic) capacity is occurring. As this new generation capacity is interconnected with the electric power system (EPS), it is critical that their grid interconnection systems have proper controls in place so that they react appropriately in case of an unintentional islanding event. Advanced controls and methods for unintentional islanding protection that go beyond existing standards, such as UL 1741 and IEEE Std 1547, are often required as more complex high penetration photovoltaic installations occur. This paper describes the implementation, experimental results, and validation of a power hardware-in-the-loop (PHIL)-based platform that allows for the rapid evaluation of advanced anti-islanding and other controls in complex scenarios. The PHIL-based approach presented allows for accurate, real-time simulation of complex scenarios by connecting a device under test to a software-based model of a local EPS. This approach was validated by conducting an unintentional islanding test of a photovoltaic inverter, as described in IEEE 1547.1, using both PHIL and discrete hardware-based test configurations. The comparison of the results of these two experiments demonstrates that this novel PHIL-based test platform accurately emulates traditional unintentional islanding tests. The advantage of PHIL-based testing over discrete hardware-only testing is demonstrated by completing an IEEE 1547 1 unintentional islanding test using a very precisely tuned resonant circuit that is difficult to realize with discrete hardware using PHIL.
引用
收藏
页码:3141 / 3146
页数:6
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