A Low Dark Count p-i-n Diode Based SPAD in CMOS Technology

被引：65

作者：

Veerappan, Chockalingam ^{[1
]}

Charbon, Edoardo ^{[1
]}

机构：

[1] Delft Univ Technol, NL-2628 CD Delft, Netherlands

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2016年 / 63卷 / 01期

关键词：

CMOS; p-i-n; single-photon avalanche diode (SPAD); substrate isolation; wide depletion; PHOTON AVALANCHE-DIODE; TIME-OF-FLIGHT; 130NM CMOS; ARRAY; IMAGER;

D O I：

10.1109/TED.2015.2475355

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, a novel CMOS single-photon avalanche diode (SPAD) is presented, and the device is designed using a vertical p-i-n diode construction. The p-i-n diode with a wide depletion region enables a low-noise operation. The proposed design achieves dark count rates of 1.5 cps/mu m(2) at 11 V excess bias, while the photon detection probability (PDP) is greater than 40% from 460 to 600 nm. Through the operation at very high excess bias voltages, it is possible to reach the PDP compression point where sensitivity to the breakdown voltage is low, thus ensuring high PDP uniformity; this feature makes it, especially, suitable for multimegapixel SPAD arrays.

引用

页码：65 / 71

页数：7

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