Investigation of chained analog signal processors in Programmable Analog Computer

被引:0
作者
Pilat, Adam Krzysztof [1 ]
Klocek, Jakub [2 ]
机构
[1] AGH Univ Sci & Technol, Dept Automat, Al A Mickiewicza 30, PL-30059 Krakow, Poland
[2] OPTISTER, Krakow, Poland
来源
11TH IFAC/IEEE INTERNATIONAL CONFERENCE ON PROGRAMMABLE DEVICES AND EMBEDDED SYSTEMS (PDES 2012) | 2012年
关键词
programmable controllers; analog computers; sampled signals; concurrent architectures; real-time computers; low pass filters; high-order controller; FPAA; Field Programmable Analog Array; dpASP; dynamically programmable Analog Signal Processor;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
This elaboration presents a new device based on dynamically programmable Analog Signal Processors (dpASP) developed for hard real-time control applications. The developed Programmable Analog Computer/Controller (PAC) is an open hardware for a wide range of signal processing tasks. In this report the analog signal routing and filter based signal processing realized by the dpASP is presented. This research was focused on the signals form as they are processed and transferred between analog processors. The investigation is exampled by the low-pass filter(s) embedded into every analog processor. For complex signal processing tasks a few dpASP must be routed together. The dpASP chain is created for signal diagnosis and due to the limited resources of a single device. Final conclusions related to chaining analog processors are given.
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页数:5
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