10-Gb/s Data Frame Generation Circuit with Frequency Modulation in 65-nm CMOS

被引:1
|
作者
Uemura, Hiromu [1 ]
Furuichi, Kosuke [1 ]
Koda, Natsuyuki [1 ]
Inaba, Hiromi [2 ]
Kishine, Keiji [2 ]
机构
[1] Univ Shiga Prefecture, Hikone City, Shiga, Japan
[2] Univ Shiga Prefecture, Sch Engn, Hikone City, Shiga, Japan
基金
日本学术振兴会;
关键词
FM; transmission system; 10-Gb/s; 65-nm CMOS process;
D O I
10.5573/JSTS.2018.18.2.238
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Currently, there is a great demand for high speed and large capacity communication systems. Therefore, it is important to develop circuit and device technologies that support these systems. Furthermore, it is important that high speed and large capacity systems are developed based on those technologies. In this paper, we propose a transmitter design method for the transmission system that the additional signal add to 10-Gb/s signal. The system transmits the data frames and the additional information simultaneously. To add the additional information, called the "labeling signal", to the data frames, we perform a frequency modulation technique on the transmitted data frames. To confirm the performance of the proposed circuit and design method, we fabricate an IC with the proposed system's transmitter by using the 65-nm CMOS process. We confirm that the data frames are frequency modulated and the transmitter generates the frequency-modulated data frames.
引用
收藏
页码:238 / 245
页数:8
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