Research of 2-bit Quantization Arithmetic in DS-SS Receiver

被引：0
|
作者：
Zhao Hongwei [1 ]
Lian Baowang [1 ]
Feng Juan [1 ]
Lian Jie [1 ]
机构：
[1] NW Polytech Univ, Coll Elect Informat, Xian 710072, Peoples R China
来源：
ICIEA: 2009 4TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS, VOLS 1-6 | 2009年
关键词：
2-bit quantization; signal capture; correlation; receiver; DS-SS;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In order to solve the problem that chips' area and power is too large, input data are reduced the bit width generally in the development of ASIC of DS-SS system. This paper proposed a new method for 2-bit quantization and simulated its correlation capability for receiving pseudo-noise (PN) signals. This paper also verified the correctness and validity of this method through comparing its capability with that of 8 bit quantization. Now, the 2-bit quantization algorithm has been applied in the design of ASIC of "Beidou" Navigation Test Satellite, and it has been proved the method is feasible in application.
引用
收藏
页码：2686 / 2689
页数：4
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