Programming heterogeneous CPU-GPU systems by high-level dataflow synthesis

被引:0
作者
Bloch, Aurelien [1 ]
Bezati, Endri [2 ]
Mattavelli, Marco [1 ]
机构
[1] Ecole Polytech Fed Lausanne, SCI STI MM, Lausanne, Switzerland
[2] Ecole Polytech Fed Lausanne, VLSC, Lausanne, Switzerland
来源
2020 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS (SIPS) | 2020年
关键词
dynamic dataflow programs; RVC-CAL; parallel computing; source-to-source compiler; GPU programming; heterogeneous systems;
D O I
10.1109/sips50750.2020.9195250
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Heterogeneous processing platforms combining in various architectures CPUs, GPUs, and programmable logic, are continuously evolving providing at each generation higher theoretical levels of computing performance. However, the challenge of how efficiently specify and explore the design space of applications executing on the different components of heterogeneous platforms remains an open problem and is the subject of many research efforts. The paper describes a dataflow based approach for the synthesis of applications to be executed on mixed CPU and GPU architectures. The new high-level approach consists of partitioning the application dataflow program written in RVC-CAL into CPU and GPU components, then on generating by automatic synthesis the C++ and CUDA programs that together implement the application executable. The design approach provides portability of applications on CPUs, GPUs, and mixed CPU/GPU architectures as well as the possibility of exploring the design space of all partitioning options without the need of rewriting the application code. The paper describes the essential methodology features at the base of the synthesis of CPU/GPU code and reports some example design cases validating the correctness of the approach.
引用
收藏
页码:59 / 64
页数:6
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