NVMain 2.0: A User-Friendly Memory Simulator to Model (Non-) Volatile Memory Systems

被引：167

作者：

Poremba, Matthew ^{[1
]}

Zhang, Tao ^{[1
]}

Xie, Yuan ^{[1
]}

机构：

[1] Penn State Univ, Dept Comp Sci & Engn, University Pk, PA 16802 USA

来源：

IEEE COMPUTER ARCHITECTURE LETTERS | 2015年 / 14卷 / 02期

基金：

美国国家科学基金会;

关键词：

Memory architecture; random access memory; nonvolatile memory; phase change memory; SDRAM;

D O I：

10.1109/LCA.2015.2402435

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this letter, a flexible memory simulator - NVMain 2.0, is introduced to help the community for modeling not only commodity DRAMs but also emerging memory technologies, such as die-stacked DRAM caches, non-volatile memories (e.g., STT-RAM, PCRAM, and ReRAM) including multi-level cells (MLC), and hybrid non-volatile plus DRAM memory systems. Compared to existing memory simulators, NVMain 2.0 features a flexible user interface with compelling simulation speed and the capability of providing sub-array-level parallelism, fine-grained refresh, MLC and data encoder modeling, and distributed energy profiling.

引用

页码：140 / 143

页数：4

共 10 条

[1]

[Anonymous], P 39 ANN INT S COMP

[2]

[Anonymous], 2009, HP LAB

[3]

[Anonymous], 2014, P ISPASS

[4]

[Anonymous], DDR3 SDRAM VER MOD

[5]

Chandrasekar K., 2011, Proceedings of the 2011 14th Euromicro Conference on Digital System Design. Architectures, Methods and Tools. (DSD 2011), P99, DOI 10.1109/DSD.2011.17

[6]

Dong X., 2010, PROC ACM IEEE INT C, P1

[7] NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Nonvolatile Memory [J].

Dong, Xiangyu ;

Xu, Cong ;

Xie, Yuan ;

Jouppi, Norman P. .

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2012, 31 (07) :994-1007

[8] NVMain: An Architectural-Level Main Memory Simulator for Emerging Non-volatile Memories [J].

Poremba, Matt ;

Xie, Yuan .

2012 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2012, :392-397

[9] Fundamental Latency Trade-offs in Architecting DRAM Caches Outperforming Impractical SRAM-Tags with a Simple and Practical Design [J].

Qureshi, Moinuddin K. ;

Loh, Gabriel H. .

2012 IEEE/ACM 45TH INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE (MICRO-45), 2012, :235-246

[10]

Rosenfeld P., 2011, Computer Architecture Letters, V10, iss, P16

← 1 →