Modeling the Influence of Selected Factors on Thermal Resistance of Semiconductor Devices

被引:40
作者
Gorecki, Krzysztof [1 ]
Zarebski, Janusz [1 ]
机构
[1] Gdynia Maritime Univ, Dept Marine Elect, PL-81225 Gdynia, Poland
来源
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | 2014年 / 4卷 / 03期
关键词
Self-heating; semiconductor devices; thermal models; thermal resistance; ELECTROTHERMAL SIMULATION; RELIABILITY-ANALYSIS; POWER MOSFETS; TRANSISTORS; MANAGEMENT; CIRCUITS; SPICE;
D O I
10.1109/TCPMT.2013.2290743
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In this paper, the analytical description of the nonlinear thermal model of the semiconductor device considering the influence of the selected factors on its thermal resistance is proposed. The worked out nonlinear thermal model considers the influence of such factors as length of metal leads, solder area, dimensions of the heat-sink, ambient temperature, and dissipated power on the efficiency of heat transfer between the chip and the surrounding. The correctness of the worked out thermal model is verified experimentally for the selected types of semiconductor devices operating in different cooling conditions. In all the considered cases, the good agreement of the results of calculations and measurements is obtained.
引用
收藏
页码:421 / 428
页数:8
相关论文
共 42 条
[1]   SELF-HEATING EFFECTS IN BASIC SEMICONDUCTOR STRUCTURES [J].
AMERASEKERA, A ;
CHANG, MC ;
SEITCHIK, JA ;
CHATTERJEE, A ;
MAYARAM, K ;
CHERN, JH .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1993, 40 (10) :1836-1844
[2]   Choosing a thermal model for electrothermal simulation of power semiconductor devices [J].
Ammous, A ;
Ghedira, S ;
Allard, B ;
Morel, H ;
Renault, D .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 1999, 14 (02) :300-307
[3]  
[Anonymous], 1990, NISTSP40086
[4]   Thermal resistance analysis by induced transient (TRAIT) method for power electronic devices thermal characterization - Part II: Practice and experiments [J].
Bagnoli, PE ;
Casarosa, C ;
Dallago, E ;
Nardoni, M .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 1998, 13 (06) :1220-1228
[5]   State of the art of high temperature power electronics [J].
Buttay, Cyril ;
Planson, Dominique ;
Allard, Bruno ;
Bergogne, Dominique ;
Bevilacqua, Pascal ;
Joubert, Charles ;
Lazar, Mihai ;
Martin, Christian ;
Morel, Herve ;
Tournier, Dominique ;
Raynaud, Christophe .
MATERIALS SCIENCE AND ENGINEERING B-ADVANCED FUNCTIONAL SOLID-STATE MATERIALS, 2011, 176 (04) :283-288
[6]   Reliability analysis of power MOSFET's with the help of compact models and circuit simulation [J].
Castellazzi, A ;
Kraus, R ;
Seliger, N ;
Schmitt-Landsiedel, D .
MICROELECTRONICS RELIABILITY, 2002, 42 (9-11) :1605-1610
[7]   Reliability analysis and modeling of power MOSFETs in the 42-V-PowerNet [J].
Castellazzi, Alberto ;
Gerstenmaier, York C. ;
Wachutka, Gerhard K. M. .
IEEE TRANSACTIONS ON POWER ELECTRONICS, 2006, 21 (03) :603-612
[8]   An effective thermal circuit model for electro-thermal simulation of SOI analog circuits [J].
Cheng, Ming-C. ;
Zhang, Kun .
SOLID-STATE ELECTRONICS, 2011, 62 (01) :48-61
[9]   A novel thermomechanics-based lifetime prediction model for cycle fatigue failure mechanisms in power semiconductors [J].
Ciappa, M ;
Carbognani, F ;
Cova, P ;
Fichtner, W .
MICROELECTRONICS RELIABILITY, 2002, 42 (9-11) :1653-1658
[10]   Power module lifetime estimation from chip temperature direct measurement in an automotive traction inverter [J].
Coquery, G ;
Carubelli, S ;
Ousten, JP ;
Lallemand, R ;
Lecoq, F ;
Lhotellier, D ;
de Viry, V ;
Dupuy, P .
MICROELECTRONICS RELIABILITY, 2001, 41 (9-10) :1695-1700