Voltage-Island Partitioning and Floorplanning Under Timing Constraints

被引:13
作者
Lee, Wan-Ping [1 ,3 ]
Liu, Hung-Yi [1 ,4 ]
Chang, Yao-Wen [1 ,2 ]
机构
[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 106, Taiwan
[2] Natl Taiwan Univ, Dept Elect Engn, Taipei 106, Taiwan
[3] Carnegie Mellon Univ, Dept Elect & Comp Engn, Pittsburgh, PA 15213 USA
[4] Taiwan Semicond Mfg Co Ltd, Hsinchu 300, Taiwan
关键词
Floorplanning; layout; low power; multiple supply voltage (MSV); physical design; B-ASTERISK-TREE;
D O I
10.1109/TCAD.2009.2013997
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction. The underlying idea behind MSV is the tradeoff between power saving and performance. In this paper, we present an effective voltage-assignment technique based on dynamic programming. For circuits without reconvergent fan-outs, an optimal solution for the voltage assignment is guaranteed; for circuits with reconvergent fan-outs, a near-optimal solution is obtained. We then generate a level shifter for each net that connects two blocks in different voltage domains and perform power-network-aware floorplanning for the MSV design. Experimental results show that our floorplanner is very effective in optimizing power consumption under timing constraints.
引用
收藏
页码:690 / 702
页数:13
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