Simulation of system backend dielectric reliability

被引：3
作者：
Chen, Chang-Chih [1 ]
Bashir, Muhammad [1 ]
Milor, Linda [1 ]
Kim, Dae Hyun [1 ]
Lim, Sung Kyu [1 ]
机构：
[1] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
来源：
MICROELECTRONICS JOURNAL | 2014年 / 45卷 / 10期
基金：
美国国家科学基金会;
关键词：
Time-dependent dielectric breakdown; Backend dielectric breakdown; Reliability; BREAKDOWN; PATTERN; CHIP;
D O I：
10.1016/j.mejo.2014.01.008
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Backend dielectric breakdown degrades the reliability of circuits. A methodology to estimate chip lifetime due to backend dielectric breakdown is presented. It incorporates failures due to parallel tracks, the width effect, field enhancement due to line ends, and variation in activity and temperature. Different workloads are considered as well, in order to evaluate aging effects in microprocessors real world applications with realistic use conditions. (C) 2014 Elsevier Ltd. All rights reserved.
引用
收藏
页码：1327 / 1334
页数：8
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