A design of flash analog-to-digital converter in 180 nm CMOS process with high effective number of bits

被引：1
作者：
Budanov, D. [1 ]
Korotkov, A. [1 ]
机构：
[1] Peter Great St Petersburg Polytech Univ, Higher Sch Appl Phys & Space Technol, St Petersburg, Russia
来源：
INTERNATIONAL CONFERENCE EMERGING TRENDS IN APPLIED AND COMPUTATIONAL PHYSICS 2019 (ETACP-2019) | 2019年 / 1236卷
关键词：
ADC;
D O I：
10.1088/1742-6596/1236/1/012072
中图分类号：
TP39 [计算机的应用];
学科分类号：
081203 ; 0835 ;
摘要：
High speed flash analog-to-digital converters are used in modern high-performance telecommunication systems. Furthermore, high effective resolution of such converter should be provided. The paper presents a design of a flash analog-to-digital converter with high effective number of bits. As an example, the 8-bit flash ADC in 180 nm CMOS has been implemented. Simulation confirms efficiency of proposed design. The effective resolution of presented design achieves 6.9 bits.
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页数：5
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共 11 条
  • [1] Ajanya MP, 2018, 2018 INTERNATIONAL CONFERENCE ON CONTROL, POWER, COMMUNICATION AND COMPUTING TECHNOLOGIES (ICCPCCT), P502, DOI 10.1109/ICCPCCT.2018.8574244
  • [2] Budanov DO, 2018, PROCEEDINGS OF THE 2018 IEEE INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING AND PHOTONICS (EEXPOLYTECH), P56, DOI 10.1109/EExPolytech.2018.8564441
  • [3] Budanov DO, 2018, PROCEEDINGS OF THE 2018 IEEE CONFERENCE OF RUSSIAN YOUNG RESEARCHERS IN ELECTRICAL AND ELECTRONIC ENGINEERING (EICONRUS), P173, DOI 10.1109/EIConRus.2018.8317058
  • [4] Digital calibration incorporating redundancy of flash ADCs
    Flynn, MP
    Donovan, C
    Sattler, L
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2003, 50 (05) : 205 - 213
  • [5] A 65 nm CMOS 7b 2 GS/s 20.7 mW Flash ADC With Cascaded Latch Interpolation
    Kim, Jong-In
    Oh, Dong-Ryeol
    Jo, Dong-Shin
    Sung, Ba-Ro-Saim
    Ryu, Seung-Tak
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2015, 50 (10) : 2319 - 2330
  • [6] Delta-sigma modulator with a 50-MHz sampling rate implemented in 0.18-μm CMOS technology
    Korotkov A.S.
    Pilipko M.M.
    Morozov D.V.
    Hauer J.
    [J]. Russian Microelectronics, 2010, 39 (3) : 210 - 219
  • [7] Piatak I, 2016, IEEE NW RUSS YOUNG, P646, DOI 10.1109/EIConRusNW.2016.7448266
  • [8] Sidun A, 2018, PROCEEDINGS OF THE 2018 IEEE INTERNATIONAL CONFERENCE ON ELECTRICAL ENGINEERING AND PHOTONICS (EEXPOLYTECH), P69, DOI 10.1109/EExPolytech.2018.8564368
  • [9] Sidun AV, 2018, PROCEEDINGS OF THE 2018 IEEE CONFERENCE OF RUSSIAN YOUNG RESEARCHERS IN ELECTRICAL AND ELECTRONIC ENGINEERING (EICONRUS), P241, DOI 10.1109/EIConRus.2018.8317074
  • [10] A 1-V 1.25-GS/S 8-bit self-calibrated flash ADC in 90-nm digital CMOS
    Yu, Hairong
    Chang, Mau-Chung Frank
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2008, 55 (07) : 668 - 672
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