A porous silicon process for encapsulated single crystal, surface micromachined microstructures

This paper describes a 10-mask process for fabricating single crystal, surface micromachined devices by using porous silicon as a sacrificial layer, and an n-type epitaxial layer for structural material. Single crystal structures have the important advantage over polysilicon structures of precisely controled material properties, in particular Young's Modulus and residual strain. Additionally, the epitaxial layer is suitable for integrating circuitry, and provides a promising alternative for integrated microsystems. This results in a process with similar flexibility in device design to a polysilicon surface micromachined process, but with the control of a bulk silicon technology. The process also includes provisions for device encapsulation in vacuum using reactive sealing of the microstructure with an LPCVD polysilicon layer. Although this technology is versatile and can be used for a variety of microstructures, the primary demonstration vehicles used in this research effort have been resonators. Some of the key problems in using porous silicon processes include: dimensional control of the porous silicon region; creating a high aspect ratio porous silicon region; eliminating defects induced by the porous silicon process in the remaining silicon structure; and protection of the oxidized porous silicon from etching prior to sacrificial etch.