Space-time equations for non-unimodular mappings

被引:1
作者
Xue, JL [1 ]
Lenders, P
机构
[1] Univ New S Wales, Sch Engn & Comp Sci, Sydney, NSW 2052, Australia
[2] Univ New England, Sch Math & Comp Sci, Armidale, NSW 2351, Australia
关键词
systolic array; multirate array; recurrence equations; space-time mapping;
D O I
10.1080/00207160210953
中图分类号
O29 [应用数学];
学科分类号
070104 ;
摘要
The class of systems of uniform recurrence equations (UREs) is closed under uni-modular transformations. As a result, every systolic array described by a unimodular mapping can be specified by a system of space-time UREs, in which the time and space coordinates are made explicit. As non-unimodular mappings are frequently used in systolic designs, this paper presents a method that derives space-time equations for systolic arrays described by non-unimodular mappings. The space-time equations for non-unimodular mappings are known elsewhere as sparse UREs (SUREs) because the domains of their variables are sparse and their data dependences are uniform. Our method is compositional in that space-time SUREs can be further transformed by unimodular and non-unimodular mappings, allowing a straightforward implementation in systems like ALPHA, Specifying a systolic design by space-time equations has two advantages. First, the space-time equations exhibit all useful properties about the design, allowing the design to be formally verified. Second, depending on the application area and performance requirement, the space-time equations can be realised as custom VLSI systems, FPGAs, or programs to be run on a parallel computer.
引用
收藏
页码:555 / 572
页数:18
相关论文
共 20 条
[11]  
MOLDOVAN DI, 1986, IEEE T COMPUT, V35, P1, DOI 10.1109/TC.1986.1676652
[12]  
Quinton P., 1984, 11th Annual International Symposium on Computer Architecture. Conference Proceedings (Cat. No. 84CH2051-1), P208, DOI 10.1145/800015.808184
[13]  
Quinton P., 1989, Journal of VLSI Signal Processing, V1, P95, DOI 10.1007/BF02477176
[14]   SYNTHESIZING SYSTOLIC ARRAYS FROM RECURRENCE EQUATIONS [J].
RAJOPADHYE, SV ;
FUJIMOTO, RM .
PARALLEL COMPUTING, 1990, 14 (02) :163-189
[15]  
RAMANUJAM J, 1992, SUPERCOMPUTING 92 : PROCEEDINGS, P214
[16]  
RAO SK, 1985, THESIS STANFORD U
[17]  
SCHRIJVER A, 1986, SERIES DISCRETE MATH
[18]   A LOOP TRANSFORMATION THEORY AND AN ALGORITHM TO MAXIMIZE PARALLELISM [J].
WOLF, ME ;
LAM, MS .
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 1991, 2 (04) :452-471
[19]   THE SYNTHESIS OF CONTROL SIGNALS FOR ONE-DIMENSIONAL SYSTOLIC ARRAYS [J].
XUE, JL ;
LENGAUER, C .
INTEGRATION-THE VLSI JOURNAL, 1992, 14 (01) :1-32
[20]   AUTOMATING NON-UNIMODULAR LOOP TRANSFORMATIONS FOR MASSIVE PARALLELISM [J].
XUE, JL .
PARALLEL COMPUTING, 1994, 20 (05) :711-728