A nanoanalytical investigation of the Ga2O3/GaGdO dielectric gate stack for InGaAs based MOSFET devices

被引：2
|
作者：
Longo, P. [1 ]
Paterson, G. W. [1 ]
Holland, M. C. [2 ]
Thayne, I. G. [2 ]
Craven, A. J. [1 ]
机构：
[1] Univ Glasgow, Dept Phys & Astron, Glasgow G12 8QQ, Lanark, Scotland
[2] Univ Glasgow, Dept Elect & Elect Engn, Glasgow G12 8LT, Lanark, Scotland
来源：
MICROELECTRONIC ENGINEERING | 2009年 / 86卷 / 7-9期
基金：
英国工程与自然科学研究理事会;
关键词：
TEM; EELS; InGaAs; MOSFET; Chemical analysis; Electrical properties; Dielectric stack; Oxide layer; GAAS;
D O I：
10.1016/j.mee.2009.03.131
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this paper, a subnanometer characterization of the Ga2O3/GdGaO dielectric gate stack grown on top of InGaAs lattice matched to n(+) InP substrate is presented. The paper shows the analysis of two samples grown using different substrate temperature. This clearly affects the electrical characteristics as well as the photoluminescence properties. The paper also describes how the growth conditions of oxide stack affect the elemental distribution across the interface region. (C) 2009 Elsevier B.V. All rights reserved.
引用
收藏
页码：1568 / 1570
页数：3
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