Trapping characteristics of Al2O3/HfO2/SiO2 stack structure prepared by low temperature in situ oxidation in dc sputtering

In this work, a dielectric stack with Al2O3/HfO2/SiO2 (1.8 nm/1.6 nm/2.5 nm) trilayer structure prepared by low temperature in situ natural oxidation during dc sputtering is investigated. We study the electrical characteristics, including the dielectric leakage of 10(-8) A/cm(2) at V-g=-2 V, the current transport mechanism and trap distributions through the trilayer dielectric stack. The Fowler-Nordheim barrier height of the prepared Al2O3 (phi FN,Al2O3) was extracted as 3.06 + 0.15 eV. The current variation ratios [Delta J(g)/J(g)(0)] during constant voltage stressing were found to decrease with raising gate stress voltages for the trilayer stack in comparison with that [Delta J(g)/J(g)(0)] increase with raising gate stress voltages for the two-layer HfO2/SiO2 stack. Shallow traps located in HfO2 were supposed to be major trapping centers within the trilayer stack. The proposed method of in situ oxidation during dc sputtering is of merit and low in process temperature. The trilayer dielectric stacks are an alternative option for nonvolatile memory application, especially under the consideration of low temperature limitation. (C) 2009 American Institute of Physics. [DOI: 10.1063/1.3120942]