Optimized design of interconnected bus on chip for low power

被引：0

作者：

Li, Donghai ^{[1
]}

Ma, Guangsheng ^{[1
]}

Feng, Gang ^{[1
]}

机构：

[1] Haerbin Engn Univ, Coll Comp Sci & Technol, Haerbin 150001, Heilongjiang, Peoples R China

来源：

COMPUTATIONAL SCIENCE - ICCS 2006, PT 4, PROCEEDINGS | 2006年 / 3994卷

关键词：

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

In this paper, we firstly propose an on-chip bus power consumption model, which includes the self transition power dissipated on the signal lines and the coupled transition power dissipated between every two signal lines. And then a new heuristic algorithm is proposed to determine a physical order of signal lines in bus. Experimental results show an average power saving 26.85%.

引用

页码：645 / 652

页数：8

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