Suppression of Hot-Hole Injection in High-Voltage Triple RESURF LDMOS With Sandwich N-P-N Layer: Toward High-Performance and High-Reliability

被引:0
|
作者
Qiao, Ming [1 ]
Yuan, Zhangyi'an [1 ]
Li, Yi [1 ]
Zhou, Xin [1 ]
Jin, Feng [2 ]
Yang, Jiye [2 ]
Cai, Ying [2 ]
Li, Zhaoji [1 ]
Zhang, Bo [1 ]
机构
[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu, Peoples R China
[2] Shanghai Huahong Grace Semicond Mfg Corp, Shanghai, Peoples R China
关键词
Burnout; hot-hole injection; LDMOS; triple RESURF; sandwich N-P-N layer; DEVICE;
D O I
10.1109/ispsd46842.2020.9170104
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Hot-hole induced burnout phenomenon in a high-voltage triple reduced surface field (RESURF) LDMOS with sandwich N-P-N layer is investigated in this work. The sandwich N-P-N structure is employed in the drift region of LDMOS to obtain a further optimized trade-off between specific onresistance (R-on,R-sp) and breakdown voltage (BV). However, experimental results show that the BV drops in the off-state with a period time of 2.7 s and the device burns out. To solve this problem, the corresponding burnout mechanism is analyzed and its countermeasure is proposed and demonstrated by simulation and experiment. As a result, a competitive performance with a low R-on,R-sp of 32.38 m Omega.cm(2) and a high BV of 535 V without burnout is achieved for the triple RESURF LDMOS with sandwich N-P-N layer.
引用
收藏
页码:415 / 418
页数:4
相关论文
共 50 条
  • [1] A Novel Ultralow RON,sp Triple RESURF LDMOS With Sandwich n-p-n Layer
    Qiao, Ming
    Li, Yi
    Yuan, Zhangyi'an
    Liang, Longfei
    Li, Zhaoji
    Zhang, Bo
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2020, 67 (12) : 5605 - 5612
  • [2] A High-Voltage p-LDMOS with Enhanced Current Capability Comparable to Double RESURF n-LDMOS
    Yi, Bo
    Cheng, Junji
    Kong, Moufu
    Zhang, Bingke
    Chen, Xing Bi
    PRODCEEDINGS OF THE 2018 IEEE 30TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES AND ICS (ISPSD), 2018, : 148 - 151
  • [3] HIGH-SPEED HIGH-VOLTAGE N-P-N CORE DRIVER TRANSISTOR FOR HYBRID TECHNOLOGY
    GATES, HR
    GOKHALE, BV
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1969, ED16 (02) : 244 - &
  • [4] EPITAXIAL PI-V N-P-N HIGH-VOLTAGE POWER TRANSISTORS
    DENNING, R
    MOE, DA
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1970, ED17 (09) : 711 - +
  • [5] Numerical Investigation of High-Voltage Partial Buried P/N-Layer SOI LDMOS
    Hu, Yue
    Gong, Yanfei
    Liu, Huazhen
    Xu, Qianqian
    Zhao, Wen-Sheng
    Wang, Jing
    Wang, Ying
    Wang, Gaofeng
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2017, 64 (09) : 3725 - 3733
  • [6] A RESURF P-N Bimodal LDMOS Suitable for High Voltage Power Switching Applications
    Zhang, Yongxi
    Pendharkar, Sameer
    Hower, Phil
    Giombanco, Salvatore
    Amoroso, Antonio
    Marino, Filippo
    2015 IEEE 27TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & IC'S (ISPSD), 2015, : 61 - 64
  • [7] A model with temperature-dependent exponent for hot-carrier injection in high-voltage nMOSFETs involving hot-hole injection and dispersion
    Dai, Mingzhi
    Gao, Chao
    Yap, Kinleong
    Shan, Yi
    Cao, Zigui
    Liao, Kuangyang
    Wang, Liang
    Cheng, Bo
    Liu, Shaohua
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2008, 55 (05) : 1255 - 1258
  • [8] A new Reduced Bulk Field (REBULF) high-voltage LDMOS with N+-floating layer
    Duan, Baoxing
    Zhang, Bo
    Li, Zhaoji
    2006 INTERNATIONAL CONFERENCE ON COMMUNICATIONS, CIRCUITS AND SYSTEMS PROCEEDINGS, VOLS 1-4: VOL 1: SIGNAL PROCESSING, 2006, : 2709 - 2712
  • [9] Hot-carrier behaviour of a 0.35 μm high-voltage n-channel LDMOS transistor
    Park, J. M.
    Enichimair, H.
    Minixhofer, R.
    SISPAD 2007: SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES 2007, 2007, : 369 - 372
  • [10] A HIGH-PERFORMANCE HIGH-VOLTAGE SELF-ALIGNED DOUBLE-DIFFUSED LATERAL (SADDL) P-N-P TRANSISTOR
    SUGAWARA, Y
    KAMEI, T
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 1986, 33 (01) : 23 - 27