Pentacene thin-film transistors with polymer/TiOx double-layer dielectrics operating at 3 V

We report on the fabrication of low-voltage pentacene thin-film transistors (TFTs) adopting poly-4-vinylphenol (PVP)/titanium oxide (TiOx) double-layer dielectrics deposited on an indium-tin oxide glass substrate. The total capacitance of the 45 nm thick PVP/100 nm thick (or 200 nm thick) TiOx double-layer dielectric was as high as 57-61 nF/cm(2) while the k values turn out to be 25-34. Despite small dielectric strength (similar to 0.6 MV/cm) of high-k TiOx layers, our pentacene TFT with the 45 nm thick PVP/100 nm thick TiOx double-layer dielectric exhibited an excellent mobility and an on/off current ratio of 1.52 cm(2)/V s and similar to 1 x 10(3), respectively, operating at a low gate voltage of -3 V. (c) 2007 The Electrochemical Society.