IIR Digital Filter Implementation With PLC Controler

被引:0
作者
Dodic, Aleksandar [1 ]
Babic, Rudolf [2 ]
机构
[1] Lucka Uprava Rijeka, Rijeka 51000, Hrvatska, Slovenia
[2] Univ Maribor, Fak Elektrotehn Racunalnistvo Informat, SLO-2000 Maribor, Slovenia
来源
INFORMACIJE MIDEM-JOURNAL OF MICROELECTRONICS ELECTRONIC COMPONENTS AND MATERIALS | 2008年 / 38卷 / 02期
关键词
Digital signal processing; Digital filters; IIR filter; Eliptic filter; PLC controller;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this paper the design and realization of first, second and third order recursive digital filter (IIR digital filter) with PLC controller is described. The purpose of the filter structure is eliminating unwanted signals at processing of analog signals in industrial proccess automation with PLC controllers. In practical realization the Siemens S7-315-2DP PLC controller is used. In this application the eliptical filter is chosen. cutt-off frequency was 3 Hz and sampling frequency was 50 Hz. With format long values of filter coefficients we obtain the expected stop band attenuation of 40 dB as is designed with MATLAB software. For the comparision of PLC controller realization of digital filter and simulated structure with MATLAB, the obtained values of impulse response are used. The results are sumarised in Table 2 for second order digital filter for format long and shortened mode format of coefficients entry and in Table 5 for third order digital filter only for format long coefficients, In fig. 1 the magnitude response of the empiric digital filter is shown for different values of smoothing parameter k. In fig. 2, 3 and 6 the masks as a part of the organization block of Siemens PLC controler for entry of the coefficients and input variables for the first, second an third order digital filter structure are presented. In fig. 4 the magnitude frequency response of 2(nd) order low pass eliptic IIR filter with cut-off frequency of 3 Hz is shown. The third order recursive filter is designed as caskaded form with cascade structures of the first and the second order. For this operation the MATLAB FDA toolbox is used for second order structure (SOS structure) calculation. The first and second order structures for eliptic recursive digital filter the SOS matric is presented in equation (10) and in fig. 5 the general cascade realization of two structures recursive digital filter for third and also for fourth order digital filters is shown. The impulse response and the magnitude frequency response of 3(rd) order eliptic IIR digital filter with cut oft frequency of 3 Hz are shown in Fig. 7 and 8 respectively. In comparison to the second order digital filter where the attenuation of 40 dB is obtained at 15 Hz with third order digital filter structure the attenuation of 40 dB is obtained at 7 Hz.
引用
收藏
页码:103 / 110
页数:8
相关论文
共 50 条
  • [31] An Avoidance of Local Minimum Stagnation in IIR Filter Design Using PSO
    Nishimura, Yuji
    Suyama, Kenji
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 2015, E98A (07) : 1544 - 1548
  • [32] Design and Implementation of Efficient Digital Filter for Preprocessing of EEG Signals
    Anshul
    Bansal, Dipali
    Mahajan, Rashima
    PROCEEDINGS OF THE 2019 6TH INTERNATIONAL CONFERENCE ON COMPUTING FOR SUSTAINABLE GLOBAL DEVELOPMENT (INDIACOM), 2019, : 862 - 868
  • [33] The practicability of adaptive FIR digital filter implementation with FPGA circuits
    Osebik, D
    Babi, R
    INFORMACIJE MIDEM-JOURNAL OF MICROELECTRONICS ELECTRONIC COMPONENTS AND MATERIALS, 2002, 32 (03): : 157 - 166
  • [34] MULTIPROCESSOR FPGA IMPLEMENTATION OF A 2D DIGITAL FILTER
    Tsuei, Danny Teng-Hsiang
    Dabbagh, Mohamed-Yahia
    Sachdev, Manoj
    2011 24TH CANADIAN CONFERENCE ON ELECTRICAL AND COMPUTER ENGINEERING (CCECE), 2011, : 630 - 633
  • [35] Particle Swann Optimization on D-stable IIR Filter Design
    Pan, Shing-Tai
    Chang, Cheng-Yuan
    2011 9TH WORLD CONGRESS ON INTELLIGENT CONTROL AND AUTOMATION (WCICA 2011), 2011, : 621 - 626
  • [36] High speed IIR filter for XILINX FPGA
    Landry, R
    Calmettes, V
    Robin, E
    1998 MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, 1999, : 46 - 49
  • [37] A Cascaded IIR Filter with Optimized Group Delay
    Tong, Xingyuan
    He, Lulu
    Du, Huimin
    Dong, Siwan
    PROCEEDINGS OF THE 2019 14TH IEEE CONFERENCE ON INDUSTRIAL ELECTRONICS AND APPLICATIONS (ICIEA 2019), 2019, : 1990 - 1993
  • [38] IIR Filter Design with Novel Stability Condition
    Jiang, Aimin
    Kwan, Hon Keung
    Liu, Xiaofeng
    Xu, Ning
    Tang, Yibin
    Zhu, Yanping
    2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2015, : 2968 - 2971
  • [39] LINE DETECTION USING AN OPTIMAL IIR FILTER
    ZIOU, D
    PATTERN RECOGNITION, 1991, 24 (06) : 465 - 478
  • [40] NONLINEAR DELAYED N-PATH ADAPTIVE IIR DIGITAL-FILTER FOR NONLINEAR-SYSTEM MODELING
    KWAN, HK
    ELECTRONICS LETTERS, 1993, 29 (12) : 1109 - 1111