Processing, properties, and reliability of electroplated lead-free solder bumps

被引：5

作者：

Kiumi, R ^{[1
]}

Yoshioka, J ^{[1
]}

Kuriyama, F ^{[1
]}

Saito, N ^{[1
]}

Shimoyama, M ^{[1
]}

机构：

[1] Ebara Corp, Precis Machinery Grp, Fujisawa, Kanagawa 2518502, Japan

来源：

ITHERM 2002: EIGHTH INTERSOCIETY CONFERENCE ON THERMAL AND THERMOMECHANICAL PHENOMENA IN ELECTRONIC SYSTEMS, PROCEEDINGS | 2002年

关键词：

lead-free solder bump; Sn-Ag eutectic alloy; Sn-Cu eutectic alloy; Sn-Ag-Cu eutectic alloy; electroplating process;

D O I：

10.1109/ITHERM.2002.1012552

中图分类号：

O414.1 [热力学];

学科分类号：

摘要：

Eutectic tin-silver (Sn-Ag), tin-copper (Sn-Cu), and tin-silver-copper (Sn-Ag-Cu) solder alloys are potential lead-free materials for low-temperature processing of solder bumps on wafers. But, before they can be adopted to replace the existing lead-free materials, processes have to be developed to provide controls over composition, height and shape uniformity, and defect formation, such as micro-voids, which are detrimental to bump reliability. Over the last six years, we have developed an electroplating technology using a dipplating machine for processing the three types of eutectic lead-free solder bumps on silicon wafer. Our process is suitable for mass production with well-controlled bump geometry and composition, and uniformity within 10% over the entire wafer. In this paper, we will describe our process and present our results on the bump properties, such as composition, melting point, and microstructure of the bumps.

引用

页码：909 / 914

页数：6

共 11 条

[1] Eutectic solder bumped flip chip development [J].

Akashi, T ;

Chikai, T ;

Hamano, T ;

Yoshida, A ;

Honma, S ;

Aoki, H ;

Miyata, M ;

Ezawa, K ;

Makita, T ;

Miyaoka, M .

TWENTY FIRST IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, 1997, :319-325

[2] Eutectic solder flip chip technology - Bumping and assembly process development for CSP/BGA [J].

Aoki, H ;

Takubo, C ;

Nakazawa, T ;

Honma, S ;

Doi, K ;

Miyata, M ;

Ezawa, H ;

Hiruta, Y .

47TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE, 1997 PROCEEDINGS, 1997, :325-331

[3] Eutectic Sn-Ag solder bump process for ULSI flip chip technology [J].

Ezawa, H ;

Miyata, M ;

Honma, S ;

Inoue, H ;

Tokuoka, T ;

Yoskioka, J ;

Tsujimura, M .

50TH ELECTRONIC COMPONENTS & TECHNOLOGY CONFERENCE - 2000 PROCEEDINGS, 2000, :1095-1100

[4]

EZAWA H, 1997, P IEEE CPMT INT EL M, V21, P293

[5]

KURIYAMA F, 2001, 3 ANN SEMICON W WAF

[6]

Massalski T. B., 1990, BINARY ALLOY PHASE D, V1

[7]

MIYATA M, 2000, P 4 2000 IEMT IMC S, P122

[8] Phase equilibria and the related properties of Sn-Ag-Cu based Pb-free solder alloys [J].

Ohnuma, I ;

Miyashita, M ;

Anzai, K ;

Liu, XJ ;

Ohtani, H ;

Kainuma, R ;

Ishida, K .

JOURNAL OF ELECTRONIC MATERIALS, 2000, 29 (10) :1137-1144

[9]

OSHIMA Y, 1997, 35 IRPS APR

[10]

VARDAMAN EJ, 1999, ADV MICROELECTRO MAR, P23

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