FPGA Implementation of CPS-SPWM for Grid Connected Photovoltaic System

In this paper, a new circuit implementation of Carrier Phase Shifting Sinusoidal Pulse Width Modulation(CPS-SPWM) for grid connected cascaded multilevel inverter is presented. The SPWM control scheme is realized with only a single Field programmable gate array (FPGA) chip EP1K from ALRERA, Inc. and the programming language is Very High Speed Integrated Circuit Hardware Description Language (VHDL). Analysis and practical implementation of the regular sampled three-phase CPS-SPWM waveform has been proposed in this paper. An ALRERA FPGA chip is employed to fulfill all the function of CPS-SPWM scheme, such as clock divider module, triangular carrier generation module, sine wave generation module, comparing module, dead time module and so on. The simulation and experimental results show that the presentation of FPGA implementation of CPS-SPWM for grid connected photovoltaic system is feasible. This is prospective to the further application of multilevel converters in large-scale centralized grid connected photovoltaic system.