Performance Analysis of High-Rate LDPC Codes

被引：0
|
作者：
Mei, Ya-qing [1 ]
Yu, Seok-kun [1 ]
Joo, Eon Kyeong [1 ]
机构：
[1] Kyungpook Natl Univ, Sch Elect Engn, Daegu, South Korea
来源：
INTERNATIONAL CONFERENCE ON COMPUTER SCIENCE AND INFORMATION ENGINEERING (CSIE 2015) | 2015年
关键词：
Low density parity check code; Error floor; Structured extended irregular repeat-accumulate code; Trapping set;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
High-rate low-density parity-check (LDPC) codes may be needed to ensure their transmission speed and reliability of high-speed communication systems and storage systems. Long and low-rate random LDPC code can achieve an excellent performance near Shannon limit. However, a high-rate random code with good error correcting performance is difficult to obtain. Structured LDPC codes are well known for the low error floor and low complexity. Therefore, high-rate structured LDPC codes with low error floor and more options of code length and rate are considered in this paper. Also, the BER performance of several LDPC codes is evaluated by simulation. In addition, the undesired error pattern of LDPC codes in the error floor region is analyzed from the numerical and simulation results.
引用
收藏
页码：36 / 39
页数：4
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