Methodology to Design-For-Testability Automation for Mixed-Signal Integrated Circuits

被引：0
|
作者：
Mosin, Sergey [1 ]
机构：
[1] Vladimir State Univ, Dept Comp Engn, Vladimir, Russia
来源：
PROCEEDINGS OF IEEE EAST-WEST DESIGN & TEST SYMPOSIUM (EWDTS 2013) | 2013年
关键词：
ANALOG;
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
The methodology of design-for-testability automation of mixed-signal IC is proposed. Functional model of DFT automation is presented as IDEF0-diagram based on the system analysis. The list of data of the model's four basic sets (Input, Control, Tools and Output) required for design automation is specified. The purpose and principal realization of the key processes in the model such as simulation, test generation, testing subcircuits generation and decision making are considered. The criteria of selecting an effective DFT-solution for particular circuit design are proposed. Experimental results of the methodology application for analog-digital voice frequency codec are presented.
引用
收藏
页数：6
相关论文
共 50 条
  • [21] A Yield Optimization Methodology for Mixed-Signal Circuits
    Papadopoulou, Aikaterini
    Nikolic, Borivoje
    2017 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2017,
  • [22] Design methodology for mitigating transient errors in analogue and mixed-signal circuits
    Askari, S.
    Nourani, M.
    IET CIRCUITS DEVICES & SYSTEMS, 2012, 6 (06) : 447 - 456
  • [23] Methodological Research on Design for Testability of Mixed-signal IC
    Ju, Shuirong
    Wang, Jinfei
    Wang, Tianshe
    Qin, Dong
    PROCEEDINGS OF THE 2017 2ND INTERNATIONAL CONFERENCE ON CONTROL, AUTOMATION AND ARTIFICIAL INTELLIGENCE (CAAI 2017), 2017, 134 : 149 - 151
  • [24] GALS Partitioning Methodology for Substrate Noise Reduction in Mixed-Signal Integrated Circuits
    Babic, Milan
    Zeidler, Steffen
    Krstic, Milos
    2016 22ND IEEE INTERNATIONAL SYMPOSIUM ON ASYNCHRONOUS CIRCUITS AND SYSTEMS, 2016, : 67 - 74
  • [25] Delay Design-for-Testability for Functional RTL Circuits
    Shaheen, Ateeq-Ur-Rehman
    Hussin, Fawnizu Azmadi
    Hamid, Nor Hisham
    2015 7th International Conference on Information Technology and Electrical Engineering (ICITEE), 2015, : 494 - 499
  • [26] Design-for-test strategies for analogue and mixed-signal integrated circuits
    Richardson, A
    Olbrich, T
    Liberali, V
    Maloberti, F
    38TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, 1996, : 1139 - 1144
  • [27] Computer-aided design of analog and mixed-signal integrated circuits
    Gielen, GGE
    Rutenbar, RA
    PROCEEDINGS OF THE IEEE, 2000, 88 (12) : 1825 - 1852
  • [28] Design-for-testability for switched-current circuits
    Renovell, M
    Azais, F
    Bodin, JC
    Bertrand, Y
    16TH IEEE VLSI TEST SYMPOSIUM, PROCEEDINGS, 1998, : 370 - 375
  • [29] Analogue Integrated Circuits Design-for-Testability Flow Oriented onto OBIST Strategy
    Mosin, Sergey
    INFORMATION TECHNOLOGY AND CONTROL, 2018, 47 (03): : 521 - 531
  • [30] Test and Design-for-Testability Solutions for Monolithic 3D Integrated Circuits
    Koneru, Abhishek
    Chakrabarty, Krishnendu
    GLSVLSI '19 - PROCEEDINGS OF THE 2019 ON GREAT LAKES SYMPOSIUM ON VLSI, 2019, : 457 - 462
12345